View HFC0400_7672375.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HFC0400 fixed frequenc y fly b ack controller with ultra-low no load power consumption hfc040 0 rev. 1 . 0 www.monolithicpower.com 1 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology descri ption HFC0400 i s a fixed-frequency current-mode controller with built-in slope compensation. it targets medium-power, off-line, flyb ack, swit ch- mode power supplie s. at light loads, th e controller fr eezes the p eak current and reduces its switching frequency down to 25 khz to offer excellent lig ht-load efficiency. at very ligh t loads, the controller enters burst mode to achieve very low standby power consumptio n. HFC0400 offers frequency jittering to help dissipate en ergy generated by conducted noise. HFC0400 also has an x - cap dischar ge function to discharg e the x - ca p when the input is unplugged. HFC0400 features multiple prote c tions that include ther mal shutdown (tsd), vcc under- voltage lockout (uvlo), overloa d protectio n (olp), ove r-voltage protection ( o vp), and brown-out protection. HFC0400 is available in an soic8-7 a package. features ? fixed-frequency current-mode control with built-in slop e compensation ? frequency foldback dow n to 25khz at light loads ? burst mode for low stan dby power consumptio n ? frequency jitter to reduce emi signature ? x - cap discharge functio n ? internal high -voltage current source ? vcc under-voltage lockout with hysteresis (uvlo) ? brown-out protection on hv pin ? overload protection with programma ble delay ? thermal shutdown (auto-restart with hysteresis) ? latch-off for external over-voltage protection (ovp) and o v er-tempera t ure protection (otp) on ti mer pin ? short-circuit protection ? programma ble soft start appli c ations ? ac/dc ada pters for not ebook computers, tablets, and smartphones ? offline battery chargers ? lcd tv s and monitors a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. http://
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 2 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical applicatio n t1 output HFC0400 8 6 5 4 3 2 1 ti mer hv gnd fb cs vcc drv input 85~265vac v cc v cc * * the circuit in red is optional. implements exte rnal ovp a nd otp fun c tion by pulling the timer pin down.
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 3 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* packag e top marking HFC0400gs soic8-7a HFC0400 * for tap e & reel, ad d suf f ix ?z (e.g. hfc04 00gs ? z); package reference timer fb cs gnd hv vcc dr v 1 2 3 4 8 6 5 t op view absolute ma xi mum ratings (1) hv break down voltage .............. -0.7v to 700v v cc , drv to gnd ............................ -0.3v to 30v fb, timer, cs to gnd .................... -0.3v to 7v continuous power dissipation (t a = +25c) (2) ............................................................. 1.3w junction te mperature ............................... 150c thermal sh utdown .................................... 150c thermal sh utdown hyst eresis .................... 25c lead temperature .................................... 260c storage temperature .............. -60c to +150c esd capabi lity human body model (all pins except hv) ............................................... 4.0kv esd capability for machine mode .............. 200v recommended operation conditions (3) operating junction temp (t j ) .. -40c to +125c operating v cc range ........................... 8v to 20v thermal resistance (4) ja jc soic8-7a ................................ 96 ...... 45 ... c/w notes : 1) exceeding these ratings ma y da m age the device. 2) the ma ximum allowable po w e r dissipation is a fun c tion of the maximum junction temperatu r e t j (max), the junction-to- ambient therm a l resistance ja , a nd the a m bient t e mperatu r e t a . the maximu m allow a ble con t inuous po w e r di ssipation at an y ambient te mperatu r e is ca lculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation w ill cause ex cessive die tempe r ature, and t h e regulator w ill g o into thermal shutdo w n . inte rnal thermal shutdo w n circuitr y pr otects the device from permanent damage. 3) the device is not guarante ed to fu nction outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 4 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. electrical characterics for ty pical value t j =25c, unless otherw i se n o ted parameter sy mbol conditio ns min t y p max unit start-up cur r ent sour ce (hv) supply cu rre nt from hv i hv v cc =6v ; v hv =400v 1.6 1.85 2.1 ma lea kag e cu rrent from hv i hv v cc =10v;v hv =40 0 v 12 15 18 a break-do wn voltage v br 700 v supply voltage manag e m e nt (v cc) vcc current -source tu rn-off level, risi ng vcc off 12 14.5 17 v vcc th re sho l d for hv tur n -on dete ction, falling vcc ss 9.5 11.5 13.5 v vcc hy ster e s is fo r hv tur n -on dete ction vcc off ? vcc ss 1.5 3 v vcc current -source tu rn-on level, falling vcc on 7.0 8.0 9.0 v vcc uv lo h y stere s is vcc off ? vcc on 5 6.5 v vcc re-ch a rge level whe n protectio n occu rs vcc pro 4.7 5.3 5.9 v vcc decre a sing level wh en latch-off phase en ds vcc lat ch 2.5 v internal ic consumption i cc v fb =2v ; c l =1 nf, v cc =12v 1 1.5 2 ma internal ic consumption, latch off pha s e i cclat ch v cc =6v 520 585 650 a voltage abov e v cc where the controlle r latch es off (ovp) v ovp 22 25 27 v ovp compar ator blan king duration ovp 26 s bro w n - ou t hv turn-o n thre sh old hv on v hv rising 95 108 120 v hv turn-off thresh old hv off v hv falling 90 103 115 v brown-ou t hystere s is ' hv 4 5.2 6.4 v timer duratio n for line cy cle drop -o ut hv c ti m e r =47nf 50 ms oscillator oscillator f r e quen cy f osc 60 65 69.5 khz frequen cy jit t er amplitude , in percentag e of f osc a jitter r 6.7 % frequen cy jit t er modul atio n period j itte r c ti mer =47nf 3.7 ms curre nt sen s e current limit v ili m 0.9 0.95 1 v short-circuit protectio n le vel v scp 1.3 1.45 1.55 v leading-ed g e blankin g for v ili m leb1 350 ns leadi ng-ed g e blankin g for v scp leb2 270 ns slope of the comp en satio n ramp s ra m p 20 25 30 mv/ s
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 5 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. electrical characterics (continued) for ty pical value t j =25c, unless otherw i se n o ted parameter sy mbol conditio ns min t y p max unit feedb ack (f b ) internal pull-up res i s t or r fb 12 13 14 k ? internal pull-up voltage v dd 4.3 v v fb to internal current set-point divis i on ratio k fb 3.0 -- fb level (fal ling) at whi c h the controlle r enters burs t mode v burl 0.29 0.32 0.35 v fb level (ri s ing) at whi c h the controlle r exits burs t mode v burh 0.42 0.46 0.50 v ov er load protec tion fb level at which the cont rolle r enters olp after blanki n g time v olp 3.7 v time du ratio n whe n fb reache s prote c tion point, before olp olp c ti m e r =47nf 50 ms freque nc y f o ldback frequen cy foldba ck fb voltage th re sh old, upp e r limit v fb(fol d) 1.8 v minimum swi t ching f r eq ue ncy f osc(mi n) 21 25 30 khz freq uen cy foldba ck fb voltage th re sh old, lower limit v fb(fol d e) 1.0 v latc h-o ff in put (integra ti on in timer ) the threshol d belo w whi c h controlle r is latch ed v t i m e r(l a t ch) 0.9 1 1.1 v blankin g du ration on lat ch dete ction lat c h 12 s drv volta g e driver voltag e high l e vel v high c l =1 nf v cc =8.4v 6.7 v c l =1 nf v cc =12v 10.3 v drive r voltag e-cl amp l e vel v clam p c l =1 nf, v cc =24v 13.4 v drive r voltag e, low level v lo w c l =1 nf, v cc =24v 16 mv driver voltage, rise tim e r c l =1 nf, v cc =16v 13 ns driver voltage, fall time f c l =1 nf, v cc =16v 23 ns driver pull-up resistance r pull-u p c l =1 nf, v cc =16v 8 ? d r iver pu ll-do w n r e s i s t anc e r pull-do w n c l =1 nf, v cc =16v 20 ?
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 6 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. pin functio n s pin # nam e des c ription 1 timer timer. thi s pi n combi n e s the soft sta r t, frequ en cy jittering, and time r function s for olp, brown-out protection, and x-cap discharge. latch the ic by pulling this pin down. 2 fb feedback. use a pull-down optoc oupler to control output regulation. 3 cs current sense. senses the primar y current for current-mode operation. 4 gnd ic ground. 5 drv drive signal output. 6 vcc power supply. 8 hv high -voltage curre n t source. inclu d e s bro w n - out an d x-ca p disch a rge fun c tion s.
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 7 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical characteri s tics vcc off (v) v bv (v) i cc (ma) leakage current from hv vs. t emperature v cc =10v ;v hv =400v internal ic consumption vs. t emperature vfb=2v , cl=1nf , vcc=12v vcc current-source t urn-off level, rising vs. t emperature vcc threshold for hv t urn-on detection, falling vs. t emperature break-down v oltage vs. t emperature v oltage above vcc where the controller latches off (ovp) vs. t emperature vcc hysteresis for hv t urn-on detection vs. t emperature vcc current-source t urn-on level, falling vs. t emperature vcc ovp (v) vcc off -vcc ss (v) vcc on (v) i hv (ma) supply current from hv vs. t emperature v cc =6v ;v hv =400v 1.20 1.40 1.60 1.80 2.00 2.20 2.40 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 4 6 8 10 12 14 16 18 20 22 24 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 -40-25 -10 5 2 0 3 5 5 0 6 5 8 0 95 1 10 125 640 660 680 700 720 740 760 780 800 820 840 -40-25-10 5 2 0 3 5 5 0 6 5 8 0 95 1 10 125 13.70 13.80 13.90 14.00 14.10 14.20 14.30 14.40 -40 -25 -10 5 20 3 5 5 0 6 5 8 0 9 5 1 10 125 1 1.35 1 1.40 1 1.45 1 1.50 1 1.55 1 1.60 1 1.65 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 vcc ss (v) 7.70 7.75 7.80 7.85 7.90 7.95 8.00 8.05 8.10 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 24.2 24.4 24.6 24.8 25.0 25.2 25.4 -40 -25 -10 5 20 35 50 65 80 951 10125 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 -40 -25 -10 5 20 35 50 65 80 95 1 10 125
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 8 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical characteri s tics (continued) f osc (khz) hv off (v) vcc latch (v) hv on (v) vcc decreasing level when latch-off phase ends vs. t emperature hv t urn-on threshold vs. t emperature oscillator frequency vs. t emperature frequency jitter amplitude, in percentage of f osc vs. t emperature hv t urn-off threshold vs. t emperature slope of the compensation ramp vs. t emperature current limit vs. t emperature minimum switching frequency vs. t emperature v ilim (v) f osc(min) (khz) vcc pro (v) vcc re-charge level when protection occurs vs. t emperature 5.10 5.15 5.20 5.25 5.30 5.35 5.40 5.45 5.50 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 2.0 2.2 2.4 2.6 2.8 3.0 3.2 -40 -25 -10 5 2 0 3 5 50 65 80 95 1 10 125 98 100 102 104 106 108 11 0 11 2 11 4 11 6 -40 -25 -10 5 2 0 3 5 5 0 6 5 80 95 1 10 125 92 94 96 98 100 102 104 106 108 11 0 -40 -25 -10 5 2 0 3 5 50 65 80 95 1 10 125 58.0 59.0 60.0 61.0 62.0 63.0 64.0 65.0 -40 -25 -10 5 20 3 5 5 0 6 5 8 0 9 5 1 10 125 6.38 6.40 6.42 6.44 6.46 6.48 6.50 6.52 -40 -25 -10 5 20 35 50 6 5 8 0 9 51 10 125 23.5 24.0 24.5 25.0 25.5 26.0 26.5 -40-25-10 5 2 0 3 5 5 0 6 5 8 0 9 51 10125 21.0 22.0 23.0 24.0 25.0 26.0 27.0 28.0 29.0 -40 -25-10 5 20 3 5 5 0 6 5 8 0 9 51 10 125 0.90 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 -40 -25 -10 5 20 3 5 50 6 5 8 0 9 5 1 10 125
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 9 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical characteri s tics (continued) v burh (v) v olp (v) v burl (v) t leb1 (ns) t leb2 (ns) leading-edge blanking for vilim vs. t emperature leading edge blanking for vscp vs. t emperature fb level (rising) at which the controller exits burst mode vs. t emperature fb level at which the controller enters olp after blanking t ime vs. t emperature fb level (falling) at which the controller enters burst mode vs. t emperature fb internal pull-up v oltage vs. t emperature fb internal pull-up resistor vs. t emperature v dd (v) v scp (v) short-circuit protection level vs. t emperature 1.40 1.41 1.42 1.43 1.44 1.45 1.46 1.47 1.48 -40 -25 -10 5 20 35 50 65 80 95 1 10 125 400 410 420 430 440 450 460 470 480 490 500 -40 -25 -10 5 2 0 3 5 50 65 80 95 1 10 125 300 310 320 330 340 350 360 370 380 390 400 -40 -25 -10 5 2 0 3 5 5 0 6 5 80 95 1 10 125 0.300 0.305 0.310 0.315 0.320 0.325 0.330 0.335 0.340 -40 -25 -10 5 2 0 3 5 5 0 6 5 8 0 95 1 10 125 0.440 0.445 0.450 0.455 0.460 0.465 0.470 0.475 0.480 -40 -25 -10 5 2 0 3 5 5 0 6 5 8 0 95 1 10 125 3.50 3.55 3.60 3.65 3.70 3.75 3.80 3.85 3.90 -40 -25 -10 5 20 3 5 5 0 6 5 8 0 95 1 10 125 10 11 12 13 14 15 16 17 18 -40-25-10 5 20 35 5 0 6 5 8 0 9 5 1 10 125 4.00 4.05 4.10 4.15 4.20 4.25 4.30 4.35 4.40 -40 -25 -10 5 20 35 50 6 5 8 0 9 5 1 10 125
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 10 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical performance characterisic v in =230vac, v out1 =5v, i out1 =3a, v out2 =16v, i out2 =1.5a, t a =25 c, unl ess otherw i se noted. input power start up inut power shut down output1 ripple output2 ripple scp entry scp recovery v ds 100v/div . v cc 10v/div . v fb 5v/div . v out2 10v/div . v ds 100v/div . v cc 10v/div . v fb 5v/div . v out2 10v/div. v ds 100v/div . v cc 10v/div . v fb 5v/div . v out1 5v/div . v out1 2v/div . v out2 5v/div . v in 200v/div . v out1 2v/div . v out1 50mv/div . v out2 5v/div . v out2 20mv/div . v in 200v/div . olp , 5v over load olp, 16v over load ovp no load v ds 100v/div . v cc 10v/div . v fb 5v/div . v out2 10v/div . v out1 5v/div . v out2 10v/div . v cc 10v/div.
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 11 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical perfo r manc e characterisic (continued) v in =230vac, v out1 =5v, i out1 =3a, v out2 =16v, i out2 =1.5a, t a =25 c, unl ess otherw i se noted. ovp full load otp entry otp recovery brown-in v in =75v ac brown-out v in =72v ac v ds 100v/div . v cc 10v/div . v fb 2v/div . v out1 5v/div . v out1 2v/div . v ds 100v/div . v cc 10v/div . v fb 2v/div . v out1 2v/div . v dr v 10v/div . v cc 10v/div . v fb 2v/div . v hv 50v/div . v dr v 10v/div . v x-cap 100v/div . v x-cap 100v/div . v cc 10v/div . v fb 2v/div . v hv 50v/div . v out2 10v/div . v cc 10v/div . conducted emi l-wire conducted emi n-wire 150khz 30mhz 150khz 30mhz 120 11 0 100 90 80 70 60 50 40 30 20 10 0 120 11 0 100 90 80 70 60 50 40 30 20 10 0 1mhz 10mhz en55022q en55022a en55022q en55022a 10mhz 1mhz
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 12 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. typical perfo r manc e characterisic (continued) v in =230vac, v out1 =5v, i out1 =3a, v out2 =16v, i out2 =1.5a, t a =25 c, unl ess otherw i se noted. efficiency 84.0 85.0 86.0 87.0 88.0 89.0 90.0 25 50 75 100 1 15v ac/60hz 230v ac/50hz no load pow e r consu mption v in (vac/hz) 85/60 115/60 230/50 265/50 p in (mw) 5v/0a, 16v/0a 26.35 27.59 32.40 35.26 5v/6ma, 16v/0a 71.92 72.72 80.70 84. 83
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 13 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. operation HFC0400 incorporates all the nece ssary featur es to build a reliable swit ch- m ode power supply. it is a fixed-frequency current-mode controller with built-in slop e compensation. at lig h t loads, th e controller fr eezes the p eak current and reduces its switchin g frequency down to 25khz to minimize switching lo sses. whe n the output power falls below a g i ven level, the controller enters burst mode. it also has e x cellent emi performance thanks to f r equency jitt e ring. its high level of integr ation requir e s very few external components. fb gn d drv vcc cs hv ti mer start up unit po wer ma nage ment driving signal management frequency fo ld back fault management comparator sl op e compensa tion x-ca p discharge fu nct i o n peak current compression ovp olp brown-out detection burst mode control figure 1: fu nctional blo ck diagr a m
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 14 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. fixed-frequenc y w i th jitter frequency jitter reduce s emi b y dissipating th e energy. figure 2 show s the circu i t of frequen cy jittering. timer s r _ q q 3. 2 v 2. 8 v 10u a 20u a v dd 14p f fb figure 2: fr e quency jitte r circuit a controlled current s ourced (fixed at 2.72a when v fb =2v) chargers the internal 14pf capacitor. comparing t he capacitor voltage to the tim e r voltage estimates the switching frequency as per equation (1). v timer is a triangular wave that ranges between 2. 8v and 3.2v with a charging/ disc harging current of 10 ? a. figure 3 shows shows the frequency jitter, jitter , as per equation (2). ? ?? ? ? s tim e r 1 f 14 pf v 2 .72 a 0.2 s (1) ti m e r ji tt e r c( 3 . 2 v 2 . 8 v ) 2 10 a ?? ?? ? ? (2) tim e f osc 65k hz 69 .3 khz 60 .4 kh z t j i tte r figure 3: fr e quency jitte r frequenc y foldback the HFC0400 implements frequen cy foldback at light load co ndition to im prove overal l efficien cy. when the load de cr eases to a given le ve l (1.33v hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 15 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. output, cau s ing v cc to dr op down to 5.3v and th e high-voltage current sou r ce turns on to recharge v cc . the a u xiliary tran sformer win d ing supplie s the ic after the controlle r starts switching. if v cc falls below 8.0v, the switching pu lse stop s an d the current source tu rns on ag ain. figure 5 shows the typical v cc under-vol tage locko ut wavefor m . figure 5: v cc under - volta ge locko ut the v cc lower threshold uvlo drop s from 8v t o 5.3v under fault conditions, such a s olp, scp, brown-out, ovp, and otp. soft start the peak current (co n trolled by the timer voltage) gradually incre a ses from 0. 25v to 1v, a s does the switching fre quency, to reduce th e stress on p o wer components and to smoothly establish t he output voltage as the timer voltage incr eases from 1v to 1.75v during start - up. figure 6 shows the typical soft-star t waveform. the timer capacitor d e termines the start-up dur ation as per equation (3) . tim e r so ft sta r t c ( 1. 75 v 1 v ) 10 / 4 a ? ?? ?? ? (3) figure 6: soft-start burst mode the HFC0400 enters burst-mode operation to minimize p ower dissip ation at no load or light load. as the load decreases, v fb decreases. t he ic stops the switching cycle when v fb drop s below the lower threshold, v brul ? 0.32v. the output voltage starts to drop, which causes v fb to increase ag ain. once v fb exceeds v bruh ? 0.46 v, switching r e sum e s. v fb then rises and f a lls repeatedly. burst mode alternately enables an d disables mosfet switching, thereb y reducing n o load or light load switching losse s. timer-base d over-loa d protection in a flyback convert e r, a fixed switchin g frequency results in a peak-current-limit ed maxi mum output power. when the outp u t demand exceeds the power limit, the output voltage drops below t he set value. then th e current flowing through primary an d secondar y optocoupler falls and v fb is pulled high. t h e HFC0400 implements a timer-based olp blo ck as per figur e 7. figure 7: ov erload prote c tion bloc k
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 16 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. when fb exceeds 3.7v (consider ed an error), the timer starts to count the v q rising edg e. remo ving t he error flag resets the timer. if t he timer reaches its completion (a cou n t of 17), o l p triggers. th is timer duration avoids triggerin g olp during the power supply start - up or a loa d transition ph ase. figure 8 shows olp. figure 8: ov erload prote c tion timer-base d brow n-out protection the brown-out protection block is similar to the olp block. when the hv voltage drops below hv off (which is an error), the timer starts to count the v q rising edg es. once the hv voltag e exceeds hv off , the timer resets. wh en the timer has counte d to 17, brown-out protection trigger s and the swit ching pulse stops. short-circu it protection (scp) the HFC0400 has sho r t-circuit pr otection tha t senses the cs voltage and stops switching if v cs reaches 1. 5v after a reduced leading-edg e blanking (l eb) time. as soon a s the fault disappears, the power supply resumes operation . thermal shutdow n (ts d ) to prevent from any lethal ther mal damag e, HFC0400 s huts down switching when the inner temperature exceeds 150 c . as soon as th e inner temperature drops below 125 c , the power supply resu mes operation. during tsd, the v cc uvlo lower threshold dr ops from 8.0v to 5.3v. v cc ove r -voltage protection (ovp) the hfc04 00 enters lat c hed fault condition if v cc goes above 25v for 25 s. the co ntroller stay s fully latche d until v cc drops below 2.5v, e . g. when the user power-cycles the mai n input. timer latc h -off for ovp and ot p pulling timer down below 1.0v for 12s latche s the HFC0400 off for external ovp an d otp etc. x-cap disc harge function x - caps typi cally filters t he differential-mode emi noise from a power supply?s input. these components pose a p o tential ha zard because they can store unsafe levels of high-voltage energy for long after th e ac line is disconnecte d. resistors in parallel t o the x - cap provide a discharge p a th to mee t safety standards, but constantly dissipate p o wer while the ac is connected, and con t ribute to no-load and standby input power consumption. figure 9: x-cap di schar ger the hfc0 400?s hv acts as a smart x - cap discharger. i n the prese n ce of an ac voltage, the internal h i g h -voltage current source turns o ff to block hv cu rrent flow and the ic mo nitors the hv voltage. upon removing the ac voltage, the ic turns on th e high-volta ge current source afte r about 32 timer cycles to discharg e the x - cap. the first d i scharge dura t ion is 16 cy cles, th en th e ic turns off the current source for 16 cycles t o detect the presence of the ac line. if the a c input remains disconne cted, the ic turns on th e current sou r ce for 48 cycles, th en off for 16 cycles repe atedly until the voltage on x - ca p drops to v cc . upon detecting an ac input, the high-voltage current sou r ce remains off until v cc
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 17 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. drops to vcc pro (5.3v) before recharging v cc to restart the system. figure 9 shows t he discharg e function waveforms. this approa ch provides a discharg e path for t h e x - cap, eliminating disch arge resistor s and reduce power loss. clamped driver the drv voltage is safely clamped at 13.4v when v cc exceeds 16v, allowing th e use o f an y standard mosfet. leading-edge blanking an internal leading-ed ge blankin g (leb) unit containing t w o leb times is employed between the cs pin and the current comparator input to avoid premature switch ing pulse te rmination due to the para s itic capacita n ces. durin g the bla n king time, the current comparator is disa bled and ca n not turn off the external mosfet . figure 10 shows the l eb wa veform. figure 10 : leading-ed ge blanking
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 18 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. appli c ation information vcc capac itor selection * hfc040 0 8 6 5 4 3 2 1 hv gn d vcc input 85 ~26 5 v a c r1 c1 d1 d 2 figure 11 : start-up circui t figure 11 shows the start-up circuit. the value s of r1 and c1 deter mine the system start-up delay time: a larger r1 or c1 increa ses the start - up delay. th e v cc duration (from v cc, off to v cc, ss ) for brown-out detectio n should exceed half th e input period , equation (4) provides an estimated value for th e v cc capacitor, where i cc(nosw itch) is the internal consumption (close t o i cclat c h ) , a n d input is pe riod of th e ac input. for most application s , chose a v cc capacit or value th at exceeds 10f. cc ( n o s w i t c h ) in pu t vc c of f s s i0 . 5 c vc c v c c ?? ? ? ? (4) primary - si de inductor design (l m ) with build-in slope compensation, hfc040 0 supports ccm when th e duty c y cle exceeds 50%. set a ratio (k p ) of the primary ind u ctor?s ripple current amplitude vs. th e peak curr ent value to 0 hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 19 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. the followin g equation e s timates l m as in(m in ) o n m ri p p l e s v l i ?? ? (12) current-se nse resistor a) peak -curr e nt-comp a r a tor cir c uit b) t y pical wav e form figure 13 : peak-cur r en t compar ator figure 13 shows the peak-curre nt-comparator logic and th e subseque nt waveform. when the sum of the sensing re sistor voltage and th e slope comp ensator reaches v peak , th e comparator goes high t o reset the rs flip-flop, and the dr v pin is pulled down to tu rn off the mosfet. th e maxi mum c u rrent limit (v limit , as measured by v cs ) is 0.95v. the slope compensator (v slope ) is ~25mv/ s. given the margin, use 0.95v limit as v peak at fu ll load. the voltage on se nsing resist or is then: s e ns e lim it s l o p e o n v9 5 % v v ?? ? ? ? (13) so the value of the sense resistor is sense sens e pe ak v r i ? (14) select the current sense resist or with an appropriate power rating based on the power loss: ?? 2 2 p eak v al l e y se nse p eak v a ll ey sense ii 1 pi i d r 21 2 ?? ? ?? ?? ?? ? ? ? ?? ?? ?? ?? (15) low -pass filter on cs pin cs drv r ser i es r se nse c f l o w-pass filter hf c0400 figure 14 : lo w - pa ss filter on cs pin a small capacitor conn ected to the cs pin wit h r series forms a low-pass filter f o r noise filtering when the mosfet turn s on and off , as shown in figure 14. the series resistance ( r series ) shou ld not exceed 1k ? . the low-pass filter?s rc constant sh ould not exceed 1/3 of the leadin g - edge blanking period fo r scp (leb2, 270ns), o r the filtered sensed volt age won?t r each the s c p point (1.5v) to trigger scp if an output shor t circuit o ccur s . jitter perio d frequency jitter is an eff e ctive method to reduce emi b y d i ssipat ing energy. the nth-order harmonic noise bandwidth is tn ji tt e r bn ( 2 f f ) ? ?? ? ? , where ? f is the freque ncy jitter amplit ude. if b tn exceeds the resolutio n bandwidth (rbw) of the spectru m analyzer (200hz for noise freque ncy less tha n 150 khz, 9 khz for noise frequen cy between 150khz to 30mhz), the spectrum analyzer receives less noise energ y . the capacit or on the ti mer pin de termines the period of the frequency jitter. a 10a current source char ges the cap a citor; when the timer voltage reaches 3.2v, another 10a curren t
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 20 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. source discharges the capacitor t o 2.8v. this charging an d dischargin g cycle repe ats. equation (2) describ es t he jitter period in theory , a smaller f ji tter is more ef fective at e m i reduction. however, th e measurement bandwidth requir e s that f jitter sh ould be larg e compared to spe c trum analyzer rbw for effective emi reduction. also, f jitter should be less than the control-loop-g a in crossover frequency to avoid di sturbing th e output voltage regulation. so for mo st application s , select f jitte r between 200hz and 400hz. x-cap disc harge time figure 9 sh ows the x - c ap discharg e r waveforms. the maxi mum discharge time occurs at a high- line inp u t an d under no-load because the energ y on x - cap dissipates but won?t transf e r to the bulk capacitor. the maxi mu m discharge delay time is de lay j it te r 32 ?? ? ? (16) when the high-voltage current source turns on, a constant su pply current (i hv , 1.6ma t y pically) flows into h v . the curr ent-source discharge t i me for the x - cap to drop to 37% of pea k voltage ca n be estimated by: xa c ( m a x ) di sch a rge hv c6 3 % 2 v i ?? ? ?? (17) where c x is the x - cap capacitance, v ac(max ) is th e maxi mum ac-input rms value. the first d i scharging period is 16 jitter , wit h subsequent period equal to 48 jitter . the section s times approximately ee quals: disch arge j i tte r ji tt e r 16 n1 48 ?? ? ? ?? ?? (18) rounding n determins the number of detectin g sections, as every s e ction is 16 jitter , th e detecting time is shown as follow: det e c t j i t t e r t1 6 n ?? ? ? (19) as a result, t he total discharge time is then. to ta l d e l ay di sc har ge d e t e c t ?? ? ? ? ? ? (20) the total discharge time is relative to jitter . fo r example, if c ti mer is 47 nf and ji tte r =3.7ms, the x - cap dischar ge margin is 1s due to x - cap valu e deviations ( a round ? 10% typically), select an x- cap less tha n 3.3 f. though the x - cap has been discha rged, it may still reta in a high-voltage on the b u lk capa citor. for safety, make sure it is release d before th e debugging t he board. pcb la y o u t guide pcb la yout is important to achieve reliable operation, good emi performance, and go od thermal performance. follow these guidelines t o optimize performance. 1) minimize the power stage switching stage loop area. t h is includes the input lo op (c1 - t1 - q1 ? r12/r13 ? c1), the auxiliary winding loo p (t1 ? d4 ? r4 ? c3 ? t1), and the output lo op (t1 ? d6 ? c10 ? t1 and t1 ? d7 ? c14 ? t1). 2) the input loop gnd an d control cir c uit should be separate and only connect at c1. 3) connecting the q1 heatsink to th e primary gnd plane i m proves emi. 4) place the control cir c uit capacitor s (such as those for fb, cs and vcc pins) close to ic t o decouple no ise.
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 21 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. a) top b) bottom figure 15 : pcb lay out design example below is a design example of HFC0400 for dual- output applications. table 1?design spec. v in 85 to 265va c v out1 5v i out1 3a v out2 16v i out2 1.5a typical application circuit figure 16 : example of a t y p i cal application
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 22 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. a) connection diagram b) winding diagram figure 17 : tr ansformer struc t ure table 2?winding ord e r tape (t ) winding margin wall pri side terminal start?> e nd margin wall sec side wire size ( ) turns ( t ) 1 n1 2mm 3?>2 2mm 0.27mm*2 28 1 n6 2mm 1?>nc 2mm 0.3mm*1 20 3 n4 2mm 7,8?>9,10 2mm 0.33mm*12 3 1 n3 2mm 11,12? >7,8 2mm 0.33mm*5 6 3 1 n2 2mm 5?>6 2mm 0.27mm*1 9 2 n5 2mm 2?>1 2mm 0.27mm*2 29
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 23 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. flow chart star t vcc> 14.5v timer recharge 17 times and fault=logic high internal high voltage c u rrent source on y n soft star t monitor v comp moni tor vcc switch off norm al operation v fb >0.46v n y olp=logic high y thermal monitor y vc c decr ea s e to 5.3v shut d o wn internal h i gh v oltage c urrent source latch off the switching pulse n c onti nuous fault monitor vcc<8.0v y n v cc >25v n y otp= log ic h i g h ? y n uvlo , b r own - o u t , otp & ol p is a u to r e sta r t, ovp o n vcc an d l a tc h- off on ti mer a r e lat ch m o d e rele ase fr om th e la tch con d itio n, ne ed to un plu g f r om th e m a in in put . y n s h u t o ff the sw it ch ing pu ls e y monitor v ti me r after v timer >1.0v v time r <1v n y vcc< 11.5v v hv >hv on monitor v hv n y y n v hv 3.7v fault=logic high y y y y ti mer recharge 17 times i n put unplugged from line switc h o f f internal high voltage current source o n y y vc c<2.5v? figure 18 : control flo w char t
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption hfc040 0 rev. 1 . 0 www.monolithicpower.com 24 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. evoluti o n o f the signals in presence of faults 14 .5v 8.0v 5.3v vc c d r iver fa ul t f l ag o v p fa ul t o ccu rs h e r e dr i v er pl u s e s re gu lat i on occ u rs h e re high voltage current source st art u p norma l op er a t i o n no r mal op er a t i o n no rmal o p erat i o n olp fa u l t occu rs here on of f over voltage occurs here no r m a l o p er at i o n ot p f a ul t occ u rs here no rmal operation un plug f r om main in put no rmal op erat ion no rmal op erat io n hv hv on hv off driver pluses normal operation b r ow n - out fa ul t o c cu rs here un plug from m a in in pu t no rmal operation re- p l u g to m a in i n pu t x- cap d i sch arg e o ccu r s h e re 11 .5v figure 19 : signal ev olution in the pre sence o f fau l ts
hf c0400 ? fixed-f r equ e nc y f l yb a ck c o nt r o l l er w i t h ult r a - l o w n o lo a d pow e r con s umption notice: t he i n formatio n in this docum ent is subject to chang e w i t h o u t notice. please c ontact m ps for current specifi c ations. users sho u ld w a rrant a nd g u a rante e that thi r d part y inte lle ctual prop ert y rights ar e n o t infring ed u pon w h e n inte grati ng mps prod ucts into a n y app licati on. mps w i ll n o t assume an y l e g a l resp onsi b il ity for an y sa id a pplic atio ns. hfc040 0 rev. 1 . 0 www.monolithicpower.com 25 11/28/2012 mps proprietar y information. pate nt protec ted. un authorized photo c op y and d uplication prohibited. ? 2012 mps. all rights reserved. package informati o n soic8-7a 0. 0 16( 0 . 4 1 ) 0. 0 50( 1 . 2 7 ) 0 o -8 o detail "a" 0. 0 10( 0 . 2 5) 0. 0 20( 0 . 5 0) x 4 5 o s ee d e tail "a" 0.0075 ( 0 . 19 ) 0. 00 98 ( 0 . 25 ) 0. 15 0( 3 . 8 0) 0. 15 7( 4 . 0 0) pi n 1 i d 0.050(1.27) bsc 0.013( 0 . 3 3 ) 0.02 0 ( 0 . 5 1 ) sea t i n g pl a n e 0.004(0.10) 0.010(0.25) 0 . 189 ( 4 . 80 ) 0 . 197 ( 5 . 00 ) 0. 05 3(1.3 5 ) 0. 06 9( 1. 7 5 ) top vi ew f r ont view 0 . 228(5. 8 0) 0 . 24 4( 6. 2 0) side view 14 85 re c o m m e nde d l a nd p at t e rn 0.213(5.40) 0.063(1. 6 0 ) 0.050(1. 2 7) 0.02 4( 0 . 6 1 ) note: 1 ) co n t ro l dime n s i o n i s i n i nche s . d im e n s io n in b r a c k e t is i n mi l l im e t e r s . 2 ) p ac kag e l e ng t h do e s no t i nc l ud e m o l d f l a s h , p r ot r u s i on s or ga t e b u r r s . 3 ) p ac kag e w i dt h d o e s n o t i ncl ude i n t e r l e a d f l as h o r p r o t r u s i o n s . 4 ) l e ad co p l a nari t y ( b o t to m o f le a d s a f te r fo r m i n g ) s h a l l b e 0 . 00 4" in c h e s m a x . 5 ) j e de c r e f e re nce i s m s - 0 1 2 . 6 ) dra w i ng i s no t t o s c al e . 0.010(0.25) bsc gauge plane

▲Up To Search▲

Price & Availability of HFC0400

	To Download HFC0400 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .